What is Overlay in MEMS?

In MEMS (microelectromechanical systems) manufacturing, the lithography process is the central step in determining whether the pattern in the layout can be accurately "printed" onto the silicon wafer. The overlay of lithography is a key indicator to measure the accuracy of the lithography machine in aligning the patterns of different layer designs. Lithography overlay refers to the alignment accuracy between the circuit patterns formed by the two lithography processes before and after the chip manufacturing process.

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When it comes to MEMS devices, overlay accuracy is critical. Taking the pressure chip as an example, it is necessary to carry out front and back overlaying, and accurate alignment is the basis for ensuring the correct relative position of the pressure sensitive element and the vibrating diaphragm, and any overlay error may lead to pressure perception deviation, affecting the accurate measurement of pressure changes by the chip. In the gyroscope chip, the overlay accuracy determines the relative position relationship between the micromechanical vibration structure and the detection electrode, and if there is a large error, the sensitivity and stability of the gyroscope will be greatly reduced, and it cannot provide reliable angle measurement data for applications such as inertial navigation.

 

Overlay errors are derived from lithography alignment errors, which require the lithography machine to align the alignment marks of the previous layer when exposed, but may result in slight deviations due to errors in the optical system. For example, the manufacturing accuracy limitations of optical components and wear and tear over time can cause deviations in the alignment process, making the pattern of the current lithography layer not exactly coincide with the previous layer.

 

In addition to lithography alignment errors, MEMS process errors can also cause overlays. When SiO₂, Si₃N₄, or metal layers are deposited, the stress of the material can cause local deformation of the wafer. Different materials will have different degrees of internal stresses during the deposition process, and when these stresses accumulate to a certain extent, the wafer will be bent or warped, causing the subsequent lithography layer to deviate in alignment and pattern transfer. High-temperature processes (e.g., oxidation, annealing) can cause wafers to swell or warp. In a high-temperature environment, the different coefficients of thermal expansion of wafer materials will cause thermal stress inside the wafer, resulting in deformation. This deformation can affect the alignment accuracy of subsequent lithography layers, resulting in misalignment of the pattern.

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Illustration of the effect of warpage on overlay in a MEMS process

How to control and optimize the overlay error? In the IC process, Optical Proximity Correction (OPC) is to use a calculation method to correct the pattern on the reticle so that the pattern projected onto the photoresist meets the design requirements as much as possible, so as to control the overlay error. In the MEMS process, OPC is rarely used, and MEMS devices are micron or submicron linewidths, and optical compensation is rarely used. In the MEMS process, the overlay accuracy is mainly improved by high-precision lithography machines. At the process level, the selection of materials with similar thermal expansion coefficients can effectively reduce the interlayer dislocation caused by temperature changes. For example, when depositing SiO₂, Si₃N₄, or metal layers, the material should be reasonably matched to reduce the internal stress caused by the difference in thermal expansion of the material, thereby reducing the degree of wafer deformation and improving the overlay accuracy.