Why is P-type Silicon Commonly Used in Chip Manufacturing?

From early planar CMOS processes to advanced FinFETs, p-substrates continue to be widely adopted in integrated circuit designs. Why is the manufacturing of integrated circuits more biased towards P-type silicon?
What is P-type silicon vs. N-type silicon?

In intrinsic silicon, the conductivity is poor; When pentatent elements (such as phosphorus P, arsenic As, and antimony Sb) are added to it, an extra "free electron" is produced. These free electrons can move freely → form electron-conductive semiconductors called N-type silicon.

Doped with a trivalent element (such as boron B), since the boron atom has one less valence electron than silicon→ it will form "holes" in the crystal lattice; These holes can move freely and become the majority carriers that are used to build NMOS devices.

What is the history and practical reasons for adopting P-type silicon?

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1, NMOS devices were dominant in the early days

In the 70s~80s, early digital circuits mostly used NMOS-only logic circuits. NMOS structures are fast and easy to fabricate, and can be built directly on P-type substrates without the need for additional well structures.

Therefore, P-type substrates are the substrates that naturally support NMOS devices.

2,CMOS technology continues the P-type wafer structure

With the advent of CMOS technology, it is necessary to integrate both NMOS and PMOS：

NMOS: still built on P-type substrate (compatible with previous NMOS flows)

PMOS：Build N-well on a P-type substrate to house PMOS

This means that with just one additional doping step, CMOS fabrication can be completed on existing P-type substrates.

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3,Process compatibility and yield control

The use of P-type substrates makes it easier to control latch-up problems;

As a few electrons (in the P-type), the diffusion distance is short, and the parasitic effect is easy to suppress.

The substrate grounding design and trap isolation structure are also optimized around the P-type silicon process.

4,Substrate potential fixation (simplified bias)

The P-type substrate can be directly grounded (GND) as a uniform reference potential; In the case of N-type substrates, the substrate should be connected to VDD, which will introduce potential fluctuations due to load changes, causing PMOS VT drift and noise problems.