FD-SOI, Work To 7nm

Today, CEA-Leti, a French research laboratory in Grenoble, announced the establishment of a pilot line for digital, analog and RF integrated circuits based on 10nm and 7nm FD-SOI in Europe.

The line, called Fames Pilot Line, will feature OxRAM, FeRAM, MRAM, and FeFET embedded non-volatile memory; RF switches, filters and capacitors; Integrated inductors for DC-DC converters; and heterogeneous and sequential 3D integration to create manufacturing processes.

According to previous reports, according to the blueprint formulated by the French government, the French Institute of Information Technology Electronics (Laboratoire délectronique des technologies de linformation, CEA-Leti) plans to invest more than 500 million euros in five years to develop a completely empty silicon insulated gold-oxygen semi-crystal (FD-SOI) technology to ensure the country's autonomy in the field of semiconductors, while echoing the requirements of the European Union. Leveraging the advantages of this technology to promote ecological and digital transformation, with 10nm FD-SOI chips as the main goal, we hope to meet the increasing requirements for product performance and energy efficiency in the fields of automobiles, mobile phone products and the Internet of Things.

The investment will see the construction of a 2,000-square-metre dedicated clean room that is expected to commence operations in early 2025, with the European Union expected to contribute to the critical scale needed to facilitate R&D and industrialization. The main target of the technology transfer will be ST Microelectronics and Global Foundries' joint super semiconductor fab (méga-fab) in Crolles, southeastern France, which will be responsible for the mass production of advanced FD-SOI circuits.

Jean-René Lèquepeys, CTO of CEA-Leti, said: "By integrating and combining a range of cutting-edge technologies, the Fames Pilot Line will open the door to disruptive system-on-chip architectures and provide smarter, greener and more efficient solutions for the chips of tomorrow. "

"At least 43 companies, from material suppliers and equipment manufacturers to fabless companies, EDAs, IDMs, systems companies and end users, have officially expressed their support for Fames," CEA-Leti said. The pilot line will be open to all EU stakeholders, including universities, RTOs, SMEs and industrial companies, as well as all like-minded countries, through annual public tenders and on request, and will follow a fair and non-discriminatory selection process. "

Funding will come from participating member states and "Chips JU", the EU body that drives advanced semiconductor manufacturing in Europe.

"Chips JU aims to be a catalyst and model for public-private partnerships in key areas," explains Jari Kinaret, its Executive Director. "This pilot line will drive the development of key semiconductor technologies and facilitate collaboration between multiple players in Europe." In addition to this FD-SOI pilot line, Chip JU will fund a pilot line for 2nm and smaller IC manufacturing technologies.

Shrink FD-SOI Down to 7 Nanometers

During the consultation phase leading up to the CHIPS Act, the EU asked the three leading institutions in microelectronics research – CEA-Leti, imec and Fraunhofer – how they could support Europe's goal of doubling production by 2030 and asked for their advice on a strategic roadmap. Their recommendations include the establishment of a fully depleted silicon-on-insulator (FD-SOI) pilot line in Grenoble, France, to help scale FD-SOI process technology to 10nm.

Why aim for 10 nanometers if you can aim farther away? European Commissioner Thierry Breton has made a higher claim, proposing to shrink FD-SOI to 7nm. Criticism abounded, but he persevered.

Speaking at the inauguration of the Soitec SiC fab in Bernand, near Grenoble, last September, Breton said: "If we aspire to achieve this and achieve it together at the European level, we can achieve it." "

"As part of the CHIPS Act, we have allocated funds to fund three pilot lines, including a $1 billion FD-SOI pilot line, on which we will be able to conduct all possible testing," he told the General Assembly. "We're going to help you achieve sub-10nm or even 7nm processes because you have to be ready for the market of the future."

Improving the energy efficiency of power semiconductors is seen as the key to achieving carbon neutrality. CEA-Leti claims that FD-SOI is 25% faster and consumes up to 40% less energy than equivalent transistors on solid-state silicon.

FD-SOI originated in the Grenoble region and has been the main focus of research and development at CEA-Leti for more than 20 years. This technology uses an ultra-thin insulating layer and a very thin silicon film on a silicon substrate to better control transistor behavior. The architecture also enables dynamic adjustment of switching speed during operation, providing an efficient way to optimize power consumption when speed is less critical. Due to its planar structure, FD-SOI is less complex to manufacture than FinFET.

Gone are the days when Europe only invested in research and moved production overseas, Breton said. The CHIPS Act will directly fund or authorize the funding of a competitive European industrial base across the entire semiconductor value chain.

But protecting the EU's internal market and industrial value chains requires more than just money. "We're going to be able to provide financial support, but we need breakthrough technology," Breton said. "We're going to help you take the risk because the market is there, and we can't leave it to Taiwan and the United States."

We must not be naive Any alliance between politics and industry will eventually evolve into a power struggle and arbitration to safeguard the interests of their respective factions and keep the value chain moving.

The EU's quest for technological sovereignty does not mean the end of isolationism, protectionism, or free trade. It aims to promote more bilateral cooperation with like-minded countries and strategic partners. It also aims to implement industrial policies, create sufficient industrial capacity (e.g. mega-factories) and invest at every level of the value chain.

"Our mission is not to do everything here (Europe), but to maintain our strategic autonomy," Breton said. "The project will appear. Today, we have 65 projects in the pipeline in Europe, valued at more than 100 billion euros. "

As part of the CHIPS Act, the EU will invest €11 billion over the next seven years through the European Chips Initiative to develop at least three pilot lines to industrialize state-of-the-art node-size production processes: one at imec for sub-2nm Gate Wrap-Around (GAA) process technology development, one at CEA-Leti for FD-SOI process technology up to 10nm and below, and one at the Fraunhofer Institute for heterogeneous system integration.

Many believe that to use the CHIPS Act to innovate in the global semiconductor industry, the EU must strive to become a leader in advanced chip design, not necessarily chip manufacturing. Breton is not one of them.

"Let me be clear: without fabs, there can be no industrial policy," he said. "The myth of a company without a fab has never worked, and it certainly doesn't work in the modern world. We support this reindustrialization while continuing to work with our partners. "

There may be differences on specific issues, but the common denominator is always to defend the EU's common interests. "Europe must regain control of its own destiny," Breton concluded.