TSMC, It's Done？

If you turn the clock back to 2019 five years ago, as now, TSMC is still the world's leading wafer foundry. According to TSMC in that year's financial report, TSMC's market share in the entire semiconductor foundry field was 52%. At that time, the advanced manufacturing process of this Taiwanese wafer foundry was only limited to the island of Taiwan, China.

In 2020, under the dual influence of the new crown epidemic and geopolitics, TSMC announced the construction of a factory in the United States, and then Japan and Germany also joined the camp of competing for TSMC. For a time, TSMC blossomed everywhere. But as we are about to enter 2025, what countries want TSMC to do seems to have been done with TSMC's efforts and cooperation. Japan and the United States have announced the start of mass production of chips.

As of the third quarter, TSMC's market share increased to 64.9%.

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TSMC Began Mass Production of Chips in Japan

According to Japan's Kyodo News Agency, Taiwanese semiconductor manufacturing companies have begun mass production of chips at their new fab in Kumamoto Prefecture, Japan. TSMC, the world's largest chip foundry, established a semiconductor manufacturing company called JASM Inc. in Japan three years ago. The company is a joint venture between TSMC and Sony Group and Denso, a major auto parts supplier. TSMC started construction of the Kumamoto plant in April 2022 and completed it earlier this year.

The facility has more than 480,000 square feet of clean space, or space suitable for chip manufacturing equipment. It manufactures logic chips based on a manufacturing process in the 28nm to 12nm range. These technologies are several generations behind TSMC's latest three-nanometer node, but they are still widely used to make circuits that prioritize cost-effectiveness over maximum performance.

The first customers for the new facility include Sony and Denso, with which TSMC formed a JASM joint venture. The plant will produce camera chips for Sony, as well as processors optimized for automotive subsystems.

Automotive chips, especially those that support sensitive components such as brakes, must adhere to stricter reliability standards than other circuits. Many chips use a technique called lockstep processing to reduce the risk of errors. In lockstep mode, each computation is performed by at least two different cores, and the results are then compared to identify inconsistencies.

Many automotive processors use a system-on-chip design that combines the CPU with other components. In some cases, one of these components is a network accelerator that is optimized to coordinate the flow of data between vehicle subsystems. Some automotive processors also include cybersecurity and artificial intelligence modules.

In March of this year, TSMC plans to begin construction of a second fab next to its new Kumamoto fab. The upcoming plant is expected to be operational by the end of 2027. It will be able to fabricate chips using 6nm and 7nm processes that are not supported by existing fabs.

Once fully operational, the two factories will have the capacity to produce 100,000 12-inch wafers per month. TSMC estimates that the plant will cost $20 billion to build. The Japanese government will provide billions of dollars in subsidies to support the project.

It is believed that TSMC may further expand its manufacturing operations in Japan in the future. Earlier this year, CNBC reported that the company was considering the possibility of building an advanced chip packaging factory in Japan. Advanced chip packaging is a technology that can connect multiple silicon wafers together to form a single processor.

TSMC may utilize the facility to manufacture CoWoS hardware. This is an encapsulation technology that is used in products such as Nvidia Corp.'s data center graphics cards. Since 2021, TSMC has been setting up an advanced packaging R&D center in Japan.

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TSMC's U.S. Plant Has Also Done it

After years of planning, construction, geopolitical wrangling, and labor challenges, the world's largest semiconductor foundry, Taiwan Semiconductor Manufacturing Company (TSMC), will officially begin mass production at its advanced chip manufacturing facility in Phoenix in 2025. The plant represents the arrival of advanced chip manufacturing in the U.S. and a test of whether the CHIPS and Science Act of 2022 will help stabilize the semiconductor industry supply chain for the U.S. and its allies.

In late October 2024, the company announced that the Arizona plant would produce 4% more than its Taiwan plant, an early indication of the plant's efficiency. The current factory is capable of running at the 4nm node, a process used to build Nvidia's most advanced GPUs. The second plant, scheduled to be operational in 2028, is planned to offer 2 or 3nm node processes. Both the 4nm and more advanced 3nm chips will begin mass production at TSMC's other factories in 2022, while the 2nm node will begin mass production in Taiwan this year. In the future, the company also plans to open a third plant in the United States, which will use more advanced technology.

The chipmaking giant will now receive $6.6 billion in Chips and Information Processing Standards Act funding to build its first factory in Arizona. But government funding isn't the only reason semiconductor manufacturing is back in the U.S. TSMC produces 90% of the world's advanced chips, and American companies such as Apple, Nvidia, Google, Amazon, and Qualcomm rely on them. The chip shortage during the economic shock in the early days of the pandemic has unnerved TSMC's customers and international policymakers.

TSMC has announced their intention to invest in Arizona in 2020. Dan Hutcheson, semiconductor analyst at TechInsights, said: "The CHIPS Act didn't make this plan a reality – companies were essentially moving on their own. He said big customers such as Apple have been urging TSMC to build fabs elsewhere to minimize risk.

In addition to this plant, the company has two other plants in the pipeline in the United States. The factories will produce advanced chips that are critical to artificial intelligence and defense systems.

In April this year, TSMC issued a press release saying that as the completion of the company's first wafer fab and the construction of the second wafer fab of its Arizona subsidiary continue to advance, the completion of the third fab will bring the total capital expenditure of TSMC's Phoenix, Arizona plant to more than $65 billion, making it the largest foreign direct investment in Arizona history and the largest foreign direct investment in greenfield projects in U.S. history.

According to TSMC's plan, the first fab in Arizona is expected to start production using 4nm technology in the first half of 2025. The second fab will feature the world's most advanced 2nm process technology, with next-generation nanosheet transistors in addition to the previously announced 3nm technology, with production starting in 2028. The third fab will produce chips using 2nm or more advanced processes, with production starting at the end of 2020. As with all of TSMC's state-of-the-art fabs, all three fabs will have approximately twice the cleanroom area of industry-standard logic fabs.

The three fabs are expected to create approximately 6,000 direct high-tech, high-paying jobs, create a workforce that will help support a vibrant and competitive global semiconductor ecosystem, and enable leading U.S. companies to access domestically made, cutting-edge semiconductor products as well as world-class semiconductor foundries. According to an analysis by the Greater Phoenix Economic Council, the increased investment in the three fabs will create more than 20,000 cumulative unique construction jobs, as well as tens of thousands of indirect supplier and consumer jobs.

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TSMC is not far behind in Taiwan

While the U.S. and Japanese factories are making great progress, TSMC is not far behind in its birthplace, Taiwan, China. Earlier it was reported that TSMC recently achieved a yield of 60% in 2nm trial production and plans to start full mass production in 2025.

TSMC will start production of 20nm at Fab 2 in the Baoshan area of Taiwan's Hsinchu Science Park, and plans to start phased mass production at its new facility in Taichung Central Science Park from 2026.

Relevant information shows that TSMC (TSMC) has planned to build 3 wafer factories in Kaohsiung, of which P1 and P2 will produce 2nm process chips, and P3 plant has started construction planning, license application and on-site construction, and is expected to be completed and applied for in 2026, and will produce 2nm or more advanced process chips.

TSMC has secured that Apple is a customer of the 2nm process. Apple plans to apply the 2nm process to APs (application processors) that are scheduled to be installed on the iPhone 17. Apple previously installed A15 APs with TSMC's 3nm process in the iPhone 17 Pro series released in 2023.

TSMC Deputy General Manager Zhuang Zishou attended a public meeting on the environmental impact statement of the expansion plan, and he said that the five factories in Kaohsiung are estimated to have 8,000 employees. TSMC pointed out that the Kaohsiung plant is on schedule and cooperates with government procedures. According to the content of TSMC's expansion plan, the P4 and P5 factories are expected to start construction planning, license application and on-site construction in 2025, and complete the construction and apply for the use license in 2027.

Benefiting from the demand for high-performance computing and artificial intelligence, TSMC's CoWoS advanced packaging capacity is in short supply as colleagues are expanding their advanced manufacturing plants. This has also prompted the giant to increase its layout in this area.

It is understood that TSMC currently has 5 advanced packaging and testing plants in Taiwan: Hsinchu, Tainan, Taoyuan Longtan, Taichung and Miaoli Zhunan. The Advanced Packaging and Testing Fab 5 (AP5) in Zhongke is expected to mass-produce CoWoS in the first half of 2025; The Advanced Packaging and Testing Fab 6 (AP6) in Zhunan, Miaoli integrates SoIC, InFO, CoWoS and advanced testing to plan a variety of TSMC 3D Fabric advanced packaging and silicon stacking technology production capacity.

As for TSMC's Advanced Packaging and Testing Factory 7 (AP7) in Chiayi, construction started in May this year, and the industry expects to mass-produce SoICs and CoWoS in 2026. TSMC also spent 17.14 billion yuan in August this year to purchase Innolux's Nanke plant.

Due to the successive shipments of Nvidia's B series chips, in addition to advanced processes, advanced packaging production capacity is also tight, and at present, Microsoft, Amazon, Oracle, Meta, Google and other major customers of Nvidia GB200 are stuck in advance; TSMC's CoWoS advanced packaging capacity will be doubled in 2025, and the balance between supply and demand is expected to fall from 2025 to 2026.

Write at the END

At a time when other places are aggressively pushing wafer fabs, TSMC also announced in early August that it had started construction of its first factory in Europe. It is understood that the manufacturing plant in Dresden, Germany, cost $11 billion. TSMC holds a 70 percent stake in the joint venture, called European Semiconductor Manufacturing Corp., with German automotive chipmaker Infineon Technologies, Dutch NXP Semiconductors and automotive parts supplier Bosch each owning 10 percent. According to the data, the factory is expected to be operational by the end of 2027 and will produce 40,000 wafers when completed. The plant will not be used to produce the company's most advanced chips, but will instead focus on the 28nm, 22nm and 16/12m nodes.

At the same time, TSMC is also increasing investment in technology.

For example, in terms of silicon photonics, according to Taiwanese media, TSMC has recently completed the integration of co-packaged optics (CPO) and semiconductor advanced packaging technology, and is expected to gradually send samples from early next year, so that the 1.6T optical transmission generation will begin to enter in the second half of 2025 and will also take advantage of this wave of business opportunities. The industry estimates that Broadcom and Nvidia are expected to become the first batch of TSMC customers, helping TSMC bite CPO orders.

It is reported in the industry that the micro-ring optical conditioner (MRM), the key CPO technology jointly developed and cooperated by TSMC and Broadcom, has been successfully trial-produced in the 3 Nayou process, which means that the subsequent CPO will have the opportunity to integrate with AI computing chips such as high-speed computing (HPC) or ASIC, so that the computing signal can be fully advanced to a faster optical transmission signal.

It is under the promotion of this comprehensive layout that TSMC has performed gratifyingly. This also makes the chase of Samsung, Intel, and Rapidus even more powerless. Moreover, when TSMC is blooming everywhere, how will the chip supply chain develop in the future? We don't know yet!