Integrated Circuit Lithography-etching Collaborative Process

Lithography and etching are the two core processes of nanoscale pattern transfer, and their resolution, accuracy, and consistency together determine the upper limit of device performance and yield.

This paper systematically sorts out the key mechanisms, control parameters and latest technological evolution of the whole process of photoresist coating, exposure, development, and etching.

The details are as follows:

Lithography process

Etching process

Lithography process

In integrated circuit chip manufacturing, the lithography process, as the core technology of pattern transfer, replicates the circuit design on the mask layer by layer to the wafer surface through precise optical and chemical processes, and its technological evolution has always revolved around resolution improvement and process stability optimization.

Photoresist application

The process begins with the spin coating stage of the photoresist - after the wafer is vacuum-adsorbed and fixed on the spin coater support table, the dripping photoresist forms a uniform film with the help of centrifugal force at a high speed of thousands of revolutions per second, and the film thickness is precisely controlled by the colloidal viscosity, solvent characteristics and rotation parameters.

Since photoresist is highly sensitive to temperature and humidity as a photosensitive resin material, the photoresist area needs to be illuminated with yellow lighting and strictly maintain a constant temperature and humidity environment to avoid fluctuations in material properties.

Types of photoresists

Photoresists are divided into two categories according to their development characteristics: after exposure, the exposed area dissolves in the developer and the unexposed area is retained; The negative glue is the opposite, and the unexposed area is removed. The specific choice depends on the topological requirements of the circuit pattern, such as dense line structures preferring positive adhesives to avoid edge bridging defects.

Pre-baked

After spin coating, the wafer is heated to about 80°C in a nitrogen atmosphere to promote the volatilization of the residual solvent in the film, improve the adhesion between the adhesive layer and the substrate and the ability to resist exposure interference.

Exposure

The exposure stage is a critical part of pattern transfer, where the wafer is loaded into a stepper exposure machine or scanner. Traditional steppers project the mask pattern onto the wafer surface at a quadruple scale through a zoom lens system, with resolution following a formula

R=kλ/NA

where λ is the wavelength of the light source, NA is the numerical aperture of the lens, and k is the process coefficient. At present, the mainstream light source uses ArF excimer laser with a wavelength of 193nm, and a high NA lens to achieve sub-wavelength resolution. To break through the physical diffraction limits, super-resolution techniques such as double exposure, phase-shift masks, and optical proximity effect correction are widely used. As an upgraded form of stepper, the scanner replaces full-width exposure through slit scanning exposure, effectively expanding the field of view and reducing the influence of lens aberrations, and has become a standard equipment in advanced processes.

Post-exposure baking (PEB) is required after exposure, which activates the acid-producing agent in the photoresist through light heat treatment, promoting acid-catalytic reactions, reducing standing wave effects and sharpening pattern edge contours.

Development

In the development process, the exposure area of the positive glue is dissolved in the alkaline developer, forming a relief pattern consistent with the mask. Negative glue is defined by dissolving the unexposed area. After development, it needs to be hard baked and cured to enhance the etch resistance of the photoresist and provide a protective mask for subsequent etching or ion implantation.

In recent years, extreme ultraviolet lithography (EUV) technology has broken through the resolution limit of traditional optical lithography with a 13.5nm short-wavelength light source and has become the core exposure solution for 7nm and below processes. Combined with multiple patterning technologies such as self-aligning dual imaging (SADP) and self-aligning quadruple imaging (SAQP), EUV lithography achieves higher integration while effectively controlling process costs and yields.

In addition, nanoimprint lithography (NIL), as a supplementary technology, realizes sub-10nm pattern preparation with high-precision imprinting in specific scenarios, demonstrating unique application potential. The coordinated development of these technologies continues to promote the evolution of lithography processes in the direction of higher precision and lower defect rates, supporting technological innovation and product iteration in the semiconductor industry.

Etching process

In the etching process of integrated circuit manufacturing, dry and wet etching achieve the forming of thin film patterns by precisely controlling the material removal process, and the two complement each other in terms of technical paths and applicable scenarios.

Dry etching

Dry etching uses reactive ion etching (RIE) as the core, and its equipment adopts a parallel plate structure: the wafer is placed in the lower electrode in the vacuum chamber, the upper electrode is grounded, and the injected gas is excited by applying high-frequency voltage to form a plasma, producing positive ions, free radicals and other active particles.

These particles bombard the surface of the material vertically under the acceleration of the electric field, and chemically react with the target layer to produce volatile products, which are discharged through the vacuum system to achieve anisotropic etching effect. The key to this process is a high selection ratio, that is, the difference in etch rate between the photoresist and the material layer needs to be large enough to ensure the fidelity of the pattern transfer. At the same time, it is necessary to inhibit the microloading effect to avoid the fluctuation of etch rate caused by local pattern density differences, and to reduce electrostatic damage and impurity introduction. To improve accuracy, modern RIE technology often uses inductively coupled plasma (ICP) sources or capacitively coupled plasma (CCP) sources, combined with pulsed power supply and magnetic field enhancement technology to achieve nanoscale control.

Wet etching

Wet etching relies on the direct reaction between chemical liquid and material, and is divided into two modes: immersion and rotation. The immersion type immerses the wafer in the chemical solution in the etching tank, and controls the reaction rate through diffusion. The rotary type uses fluid mechanics to enhance mass transfer efficiency by rotating the wafer and spraying chemical liquid.

Because wet etching is isotropic in nature, its lateral drilling characteristics limit the microfabrication ability, and the photoresist mask is easily eroded by chemical liquids, so it is mostly used for the processing of large-size structures or specific materials (such as metal, aluminum, oxide). After etching, the residual photoresist needs to be removed by plasma demolding or chemical peeling, in which plasma demolding uses oxygen plasma to decompose the adhesive layer, and chemical peeling is selectively dissolved with a special solvent.

In recent years, etching technology has evolved towards higher precision and environmental protection. In the dry field, atomic layer etching (ALE) achieves precise removal at the single atomic level through alternating self-limiting reactions, combining high selectivity materials with optimized plasma parameters to push the resolution limits of traditional RIE. At the same time, the three-dimensional stacking structure and advanced packaging demand promote the development of deep silicon etching, dielectric layer high aspect ratio etching and other technologies, and the use of low-temperature plasma and gas mixing strategies to reduce sidewall damage. In terms of wet process, the research and development of environmentally friendly chemical solutions (such as fluorine-free and low-toxicity formulas) has become a trend, with online monitoring and closed-loop control systems to achieve precise control of etch rate and harmless treatment of waste liquids.

0040-09094 CHAMBER 200mm

In addition, hybrid etching techniques, such as the combined wet-dry process, offer advantages in specific scenarios, such as reducing material stress through wet pretreatment and then drying fine pattern molding. These innovations continue to drive the etching process towards more efficient, greener, and more precise directions, supporting the continuous improvement of semiconductor device performance and integration.